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PCI-E Offers Expansion and Interconnectivity: Page 3 of 6

So what's the next server bottleneck location with PCI-E? Probably memory speed and memory interconnect. One-to-one clock speeds between memory and CPU clock cycles are a way's away.

Infiniband, meanwhile, is no longer an I/O technology the average enterprise should consider adopting. This channel-based interconnect architecture for servers has been largely ignored by mainstream computer and networking vendors because PCI-E and improvements in interconnect technology have rendered it moot. Intel, for instance, has abandoned its Infiniband development, and several of the original Infiniband start-ups have either merged or gone under. It's not that Infiniband was a flawed technology--it just suffered from poor timing with PCI-E's emergence. Although Infiniband is no longer a viable fit for the corporate data center, it does make sense in high-end supercomputing clusters.One of the confusing things about PCI-E is that it's both an expansion and an interconnect specification. In the past, there were strict lines between chip-to-chip architectures, such as HyperTransport and RapidIO, and expansion technologies, such as PCI. PCI-E blurs the line.

Intel is working on chipsets that communicate between each other and the processor via PCI-E. This eliminates the need for bridging between the expansion slots and the chips on the motherboard. So why not just go with PCI-E for interconnect? PCI-E isn't the only game in town: HyperTransport and RapidIO still have a major following. HyHAMD, the creator and a big supporter of the HyperTransport protocol, has built HyperTransport into its Opteron and Athlon 64 line of processors as a standard chip-to-chip interconnect. IBM and Motorola are pushing RapidIO, as are networking companies such as Alcatel and Lucent.

In addition, HyperTransport 2.0 supports mapping to PCI Express, which eases integration. Intel is making chipsets that are natively PCI-E, and systems featuring native PCI-E for interconnect as well as expansion will hit the market in the second half of this year.

The RapidIO interconnect specification is maintained by the RapidIO Trade Association. This spec is largely used for backplane I/O on an embedded system and for most interconnect chip-to-chip functions. It scales to 10 GB and has recently been expanded to an additional compatible version of RapidIO called RapidFabric. The RapidFabric spec covers low-cost options for data-plane applications in networking and telecommunications. RapidIO will come in many embedded systems, but has no impact in the PC server and workstation field.