So the bottom line is cost, that is, more power for little increase in price. Another move in that direction comes from the 300-mm wafers. That's a silicon wafer of about 12 inches in diameter. Compared with the older, 8-in. wafers, there's room for a lot more devices on the larger wafer. So the increased number of die per wafer, and a reduction of overhead (for test devices and like) make up for the cost of the larger wafer. Dhulla says it takes multiple 8-in. wafers to get the same number of die you can get from one 300-mm wafer. The cost savings are clear.
Next quarter Nocona will come out with a 3.6-GHz clock rate and 1 MB of onboard cache. It will also have PCI Express, the next generation of PCI, on chip, will support DDR2 memory technology and will have "strong reliability, availability and serviceability capabilities built in," Dhulla says.
Moore's Law seems to be alive and well, and it's giving you more power every year.
David Gabel, an electrical engineer, has been testing and writing about computers for more than 25 years.
Discover the benefits of scalable backbone and network services for application and cloud providers.
Network automation is gaining momentum. Here's how you can drive this powerful technology to its full potential.
Subsea cable alternatives can provide a level of comfort for those concerned about disruptions. Realistically, they will continue to play a small, but critical role in the short term.
